This application relates to regulating the output of a digital to analog converter, and more specifically to compensating for a nonlinearity of current levels generated when activating a current source transistor in a digital to analog converter.
Today, in general, Digital to Analog converters (DACs) may be implemented as current steering converters. Such converters may normally be constructed in a fully differential architecture. A differential architecture may provide an improved signal quality over a single ended architecture. Nevertheless, single ended architectures are still used, because they operate at a reduced power level compared with differential architectures.
When transmitting a signal with a differential architecture over a video line, the signal and its reflections may be dampened with low resistance. Dampening wastes power because the DAC supplies current to the video line independent of the signal. One typical DAC with a differential architecture provides an output that is strongly oversampled and may require a significant amount of power consumption.
To reduce the power consumption, single ended current DACs may be used. Single ended current DACs may include multiple cells of current generating transistors that are selectively activated. Single ended DACs may generate undesirable even harmonics that results from capacitive feedback into the gate of the current generating transistor when the cell is activated.